Description of the Prior Art
In general, as the semiconductor device becomes highly integrated, size of the unit cell becomes smaller. However, although the semiconductor device such as DRAM, SRAM or flash memory device become highly integrated, it is desirable to ensure the capacitance for operating the cell and to minimize an area occupied by the capacitor. To realize this object, a manufacturing technology must be developed and a reliability of the device must be ensured preferentially.
Capacitance of the capacitor is expressed by the equation given below; EQU Q=.epsilon..sub.0 .epsilon..sub.1 .times.A/d
wherein,
Q is capacitance; PA1 .epsilon..sub.0 is a dielectric constant (air); PA1 .epsilon..sub.1 is a dielectric constant of dielectric material; PA1 d is a thickness of film; and PA1 A is surface area of capacitor.
Methods for increasing the capacitance defined by the above equation and disadvantages thereof are described.
First, there is a way to use a dielectric material having a high dielectric constant for forming the capacitor. However, if the dielectric material having a high dielectric constant is used for a dielectric film of the capacitor, a leakage current is increased. Also, it is difficult to make the dielectric material having a high dielectric constant.
Second, there is a way to be lowered a thickness of the dielectric film in the capacitor. In general, an ONO film consisted of a silicon oxide film, silicon nitride film and silicon oxide film is used as the dielectric film. However, if a thickness of the ONO film is 40 .ANG. and less, the leakage current is increased, and a breakdown phenomenon occurs easily so that the it is difficult to maintain the stable capacitance.
Third, there is a way to increase a surface area of the capacitor. In order to increase a surface of an electrode in the capacitor, it is desirable that the charge storage electrode has 3 dimensional structure. However, this way causes to increase a topology between the electrode and peripheral element, and the method of forming 3 dimensional structure complicates.
To solve these problems, a method of controlling a microstructure of a polysilicon film consisting an electrode is developed for forming the polysilicon film having an hemispherical roughness structure on surface thereof. However, for forming the polysilicon film having the hemispherical roughness structure formed on surface, a doping process using POCl.sub.3 and an etch back process for isolating cells must be performed after depositing a polysilicon film having an hemispherical roughness structure.